Method and structure for enabling high aspect ratio sacrificial gates
US9842739B2 · kind B2 · utility
6Cited by
14References
16Claims
0Family size
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Key dates
| Filing date | Apr 18, 2016 |
| Grant date | Dec 12, 2017 |
| Priority date | — |
| Expiry date | Apr 18, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/834
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Sacrificial gate structures having an aspect ratio of greater than 5:1 are formed on a substrate. In some embodiments, each sacrificial gate structure straddles a portion of a semiconductor fin that is present on the substrate. An anchoring element is formed orthogonal to each sacrificial gate structure rendering the sacrificial gate structures mechanically stable. After formation of a planarization dielectric layer, each anchoring element can be removed and thereafter each sacrificial gate structure can be replaced with a functional gate structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.