Patent · US Active

Metal line layout based on line shifting

US9898572B2 · kind B2 · utility

0Cited by

1References

20Claims

0Family size

Assignee

GlobalFoundries Inc. · KY

Inventors

Thomas Melde · Dresden, DE
Matthias Lehr · Dresden, DE
Thomas Herrmann · Federal Way, US
Jens Hassmann · Dresden, DE
Moritz Andreas Meyer · Pulheim, DE
Rakesh Kumar Kuncha · Dresden, DE

Key dates

Filing date	Feb 17, 2016
Grant date	Feb 20, 2018
Priority date	—
Expiry date	May 4, 2036

Classification

Technology area (CPC G)Physics
CPC primaryG06F30/394
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A method of Back-End-Of-Line processing of a semiconductor device is provided including providing a layout for metal lines of a metallization layer of the semiconductor device, determining a semi-isolated metal line in the provided layout and shifting at least a portion of the determined semi-isolated metal line.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.