Mill Computing, Inc.
16Patents
16Active
16Granted
48Portfolio score
Filing activity: May 29, 2014 → Sep 10, 2019
Most-cited patents
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9747218B2 | CPU security mechanisms employing thread-specific protection domains | Physics | 8 | Active |
| US9524163B2 | Computer processor employing hardware-based pointer processing | Emerging Cross-Sectional Technologies | 3 | Active |
| US10678700B2 | CPU security mechanisms employing thread-specific protection domains | Physics | 2 | Active |
| US9875106B2 | Computer processor employing instruction block exit prediction | Physics | 2 | Active |
| US9513904B2 | Computer processor employing cache memory with per-byte valid bits | Emerging Cross-Sectional Technologies | 2 | Active |
| US9747216B2 | Computer processor employing byte-addressable dedicated memory for operand storage | Physics | 2 | Active |
| US11226821B2 | Computer processor employing operand data with associated meta-data | Physics | 1 | Active |
| US9513921B2 | Computer processor employing temporal addressing for storage of transient operands | Physics | 1 | Active |
| US9652230B2 | Computer processor employing dedicated hardware mechanism controlling the initialization and invalidation of cache lines | Emerging Cross-Sectional Technologies | 1 | Active |
| US9959119B2 | Computer processor employing double-ended instruction decoding | Emerging Cross-Sectional Technologies | 0 | Active |
| US9965274B2 | Computer processor employing bypass network using result tags for routing result operands | Emerging Cross-Sectional Technologies | 0 | Active |
| US10802987B2 | Computer processor employing cache memory storing backless cache lines | Emerging Cross-Sectional Technologies | 0 | Active |
| US9513920B2 | Computer processor employing split-stream encoding | Physics | 0 | Active |
| US9785441B2 | Computer processor employing instructions with elided nop operations | Physics | 0 | Active |
| US9747238B2 | Computer processor employing split crossbar circuit for operand routing and slot-based organization of functional units | Physics | 0 | Active |
| US9817669B2 | Computer processor employing explicit operations that support execution of software pipelined loops and a compiler that utilizes such operations for scheduling software pipelined loops | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.