Zing Semiconductor Corporation
40Patents
40Active
40Granted
52Portfolio score
Filing activity: Jan 22, 2016 → Nov 7, 2023
Most-cited patents
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9972637B2 | Metal-ono-vacuum tube charge trap flash (VTCTF) nonvolatile memory and the method for making the same | Electricity | 5 | Active |
| US9647067B1 | FinFET and fabrication method thereof | Electricity | 3 | Active |
| US9773891B1 | FinFET and fabrication method thereof | Electricity | 3 | Active |
| US9834861B2 | Method for growing monocrystalline silicon and monocrystalline silicon ingot prepared thereof | Chemistry; Metallurgy | 2 | Active |
| US9779999B2 | Complementary nanowire semiconductor device and fabrication method thereof | Electricity | 2 | Active |
| US9721846B1 | Hybrid integration fabrication of nanowire gate-all-around GE PFET and polygonal III-V PFET CMOS device | Electricity | 1 | Active |
| US12046520B2 | Method for detecting temperature of thermal chamber | Physics | 1 | Active |
| US9640615B1 | Method for making III-V nanowire quantum well transistor | Electricity | 1 | Active |
| US10100431B2 | Method for growing monocrystalline silicon and monocrystalline silicon ingot prepared thereof | Chemistry; Metallurgy | 1 | Active |
| US9837517B2 | Method for making III-V nanowire quantum well transistor | Electricity | 1 | Active |
| US11923254B2 | Method for detecting temperature of thermal chamber | Physics | 1 | Active |
| US9773670B2 | Method of preparation of III-V compound layer on large area Si insulating substrate | Electricity | 0 | Active |
| US12334403B2 | Measuring method of resistivity of a wafer | Physics | 0 | Active |
| US11393712B2 | Silicon on insulator structure and method of making the same | Electricity | 0 | Active |
| US12398485B2 | Method of detecting crystallographic defects and method of growing an ingot | Chemistry; Metallurgy | 0 | Active |
| US11662326B2 | Method for calculating liquid-solid interface morphology during growth of ingot | Chemistry; Metallurgy | 0 | Active |
| US11624123B2 | Method and apparatus of monocrystal growth | Chemistry; Metallurgy | 0 | Active |
| US9818844B2 | High-voltage junctionless device with drift region and the method for making the same | Electricity | 0 | Active |
| US12400917B2 | Method for verification of conductivity type of silicon wafer | Physics | 0 | Active |
| US10553496B2 | Complementary metal-oxide-semiconductor field-effect transistor and method thereof | Electricity | 0 | Active |
| US9779964B2 | Thermal processing method for wafer | Electricity | 0 | Active |
| US9634133B1 | Method of forming fin structure on patterned substrate that includes depositing quantum well layer over fin structure | Electricity | 0 | Active |
| US11427925B2 | Apparatus and method for ingot growth | Chemistry; Metallurgy | 0 | Active |
| US12107016B2 | Detection method of metal impurity in wafer | Emerging Cross-Sectional Technologies | 0 | Active |
| US11471997B2 | Polishing pad, polishing apparatus and a method for polishing silicon wafer | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.