Inventor · San Jose, CA, US

Carl H. Carmichael

17Patents
12h-index
23Co-inventors
78Inventor score

Filing activity: May 14, 1999 → Jul 24, 2020

Most-cited inventions

PatentTitleAreaCited byStatus
US7036059B1 Techniques for mitigating, detecting and correcting single event upset effects in systems using SRAM-based field programmable gate arrays Physics 126 Expired
US6308311A Method for reconfiguring a field programmable gate array from a host Physics 105 Expired
US7620883B1 Techniques for mitigating, detecting, and correcting single event upset effects Physics 51 Active
US7310759B1 Techniques for mitigating, detecting, and correcting single event upset effects in systems using SRAM-based field programmable gate arrays Physics 47 Expired
US7576557B1 Method and apparatus for mitigating one or more event upsets Electricity 39 Active
US6560665B1 Embedding firmware for a microprocessor with configuration data for a field programmable gate array Physics 25 Expired
US7249010B1 Methods of estimating susceptibility to single event upsets for a design implemented in an FPGA Physics 22 Expired
US6425077B1 System and method for reading data from a programmable logic device Physics 17 Expired
US7512871B1 Techniques for mitigating, detecting, and correcting single event upset effects in systems using SRAM-based field programmable gate arrays Physics 14 Active
US7589558B1 Method and apparatus for configuring an integrated circuit Physics 14 Active
US6982451B1 Single event upset in SRAM cells in FPGAs with high resistivity gate structures Electricity 13 Expired
US7383479B1 Techniques for mitigating, detecting, and correcting single event upset effects in systems using SRAM-based field programmable gate arrays Physics 13 Expired
US7650585B1 Implementing a user design in a programmable logic device with single event upset mitigation Physics 8 Active
US7990173B1 Single event upset mitigation Electricity 6 Active
US7626415B1 Method and apparatus for configuring an integrated circuit Electricity 4 Active
US7452765B1 Single event upset in SRAM cells in FPGAs with high resistivity gate structures Electricity 3 Expired
US11579957B1 Distributed watchdog timer and active token exchange Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.