Chieh-Yu Lin
22Patents
5h-index
28Co-inventors
69Inventor score
Filing activity: Sep 4, 1992 → Jul 17, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US11204835B2 | Error correcting memory systems | Electricity | 13 | Active |
| US5287293A | Method and apparatus for inspecting the contours of a gear | Physics | 9 | Expired |
| US5541772A | Camera zoom lens | Physics | 9 | Expired |
| US7448018B2 | System and method for employing patterning process statistics for ground rules waivers and optimization | Physics | 7 | Active |
| US5412508A | Compact zoom lens system | Physics | 5 | Expired |
| US9515148B2 | Bridging local semiconductor interconnects | Electricity | 5 | Active |
| US11036126B2 | Semiconductor fabrication design rule loophole checking for design for manufacturability optimization | Physics | 4 | Active |
| US7501212B2 | Method for generating design rules for a lithographic mask design that includes long range flare effects | Physics | 2 | Active |
| US10585346B2 | Semiconductor fabrication design rule loophole checking for design for manufacturability optimization | Physics | 2 | Active |
| US11748194B2 | Error correcting memory systems | Electricity | 2 | Active |
| US5341244A | Zoom lens system | Physics | 2 | Expired |
| USD902304S1 | Globe with stand | General | 1 | Active |
| US7090967B2 | Pattern transfer in device fabrication | Electricity | 1 | Expired |
| US10394116B2 | Semiconductor fabrication design rule loophole checking for design for manufacturability optimization | Physics | 1 | Active |
| US7962865B2 | System and method for employing patterning process statistics for ground rules waivers and optimization | Physics | 1 | Active |
| US9859303B2 | Bridging local semiconductor interconnects | Electricity | 0 | Active |
| US9898573B2 | Rule and process assumption co-optimization using feature-specific layout-based statistical analyses | Physics | 0 | Active |
| US12124332B2 | Error correcting memory systems | Electricity | 0 | Active |
| US9117051B2 | High density field effect transistor design including a broken gate line | Electricity | 0 | Active |
| US10032794B2 | Bridging local semiconductor interconnects | Electricity | 0 | Active |
| US11935601B2 | Bit line sensing circuit comprising a sample and hold circuit | Physics | 0 | Active |
| US11191488B2 | Apparatus for improving usability and accuracy for physiological measurement | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.