Chit Hwei Ng
22Patents
9h-index
28Co-inventors
71Inventor score
Filing activity: Apr 3, 2000 → May 22, 2009
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6410376B1 | Method to fabricate dual-metal CMOS transistors for sub-0.1 &mgr;m ULSI integration | Electricity | 75 | Expired |
| US6730573B1 | MIM and metal resistor formation at CU beol using only one extra mask | Electricity | 52 | Expired |
| US6670237B1 | Method for an advanced MIM capacitor | Electricity | 48 | Expired |
| US6709918B1 | Method for making a metal-insulator-metal (MIM) capacitor and metal resistor for a copper back-end-of-line (BEOL) technology | Emerging Cross-Sectional Technologies | 42 | Expired |
| US6903013B2 | Method to fill a trench and tunnel by using ALD seed layer and electroless plating | Electricity | 30 | Expired |
| US6716693B1 | Method of forming a surface coating layer within an opening within a body by atomic layer deposition | Electricity | 21 | Expired |
| US6624040B1 | Self-integrated vertical MIM capacitor in the dual damascene process | Electricity | 18 | Expired |
| US6902981B2 | Structure and process for a capacitor and other devices | Electricity | 12 | Expired |
| US7067869B2 | Adjustable 3D capacitor | Electricity | 12 | Expired |
| US6375857B1 | Method to form fuse using polymeric films | Electricity | 8 | Expired |
| US6528838B1 | Damascene MIM capacitor with a curvilinear surface structure | Electricity | 6 | Expired |
| US6645810B2 | Method to fabricate MIM capacitor using damascene process | Electricity | 6 | Expired |
| US6608362B1 | Method and device for reducing capacitive and magnetic effects from a substrate by using a schottky diode under passive components | Electricity | 5 | Expired |
| US6869884B2 | Process to reduce substrate effects by forming channels under inductor devices and around analog blocks | Electricity | 4 | Expired |
| US6852605B2 | Method of forming an inductor with continuous metal deposition | Electricity | 4 | Expired |
| US7250669B2 | Process to reduce substrate effects by forming channels under inductor devices and around analog blocks | Electricity | 4 | Expired |
| US6689643B2 | Adjustable 3D capacitor | Electricity | 3 | Expired |
| US6548367B1 | Method to fabricate MIM capacitor with a curvillnear surface using damascene process | Electricity | 3 | Expired |
| US8021954B2 | Integrated circuit system with hierarchical capacitor and method of manufacture thereof | Electricity | 3 | Active |
| US7060193B2 | Method to form both high and low-k materials over the same dielectric region, and their application in mixed mode circuits | Emerging Cross-Sectional Technologies | 2 | Expired |
| US7323736B2 | Method to form both high and low-k materials over the same dielectric region, and their application in mixed mode circuits | Emerging Cross-Sectional Technologies | 2 | Expired |
| US6821904B2 | Method of blocking nitrogen from thick gate oxide during dual gate CMP | Electricity | 1 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.