Chul-Hwan Choo
8Patents
4h-index
14Co-inventors
50Inventor score
Filing activity: Aug 8, 2006 → Apr 5, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7319634B2 | Address converter semiconductor device and semiconductor memory device having the same | Physics | 6 | Active |
| US8035412B2 | On-die termination latency clock control circuit and method of controlling the on-die termination latency clock | Physics | 5 | Active |
| US8710655B2 | Die packages and systems having the die packages | Electricity | 5 | Active |
| US8228704B2 | Stacked semiconductor chip package with shared DLL signal and method for fabricating stacked semiconductor chip package with shared DLL signal | Electricity | 4 | Active |
| US10727200B2 | Memory device including bump arrays spaced apart from each other and electronic device including the same | Electricity | 1 | Active |
| US10891204B2 | Memory system, a method of determining an error of the memory system and an electronic apparatus having the memory system | Physics | 0 | Active |
| US11928363B2 | Operating method of host device and storage device and storage device | Physics | 0 | Active |
| US7701744B2 | Method of arranging fuses in a fuse box of a semiconductor memory device and a semiconductor memory device including such an arrangement | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.