Inventor · Santa Clara, CA, US

Ish Chadha

12Patents

2h-index

7Co-inventors

39Inventor score

Filing activity: Apr 28, 2017 → Feb 26, 2024

Most-cited inventions

Patent	Title	Area	Cited by	Status
US11569939B1	Synchronizing a high-speed signaling interconnect	Electricity	4	Active
US10317459B2	Multi-chip package with selection logic and debug ports for testing inter-chip communications	Electricity	3	Active
US11956342B2	Reliable link management for a high-speed signaling interconnect	Electricity	1	Active
US11784890B2	Link training through handshake on high-speed interconnect	Physics	1	Active
US11575494B1	Link status detection for a high-speed signaling interconnect	Electricity	1	Active
US11899609B2	Frame alignment recovery for a high-speed signaling interconnect	Electricity	0	Active
US12353271B2	Error rate interrupts in hardware for high-speed signaling interconnect	Physics	0	Active
US11936379B2	Digital delay line calibration with duty cycle correction for high bandwidth memory interface	Electricity	0	Active
US12395311B2	Reliable link management for a high-speed signaling interconnect	Electricity	0	Active
US11880265B2	Error rate interrupts in hardware for high-speed signaling interconnect	Physics	0	Active
US12027198B2	Mitigating duty cycle distortion degradation due to device aging on high-bandwidth memory interface	Physics	0	Active
US12405629B2	High-speed signaling system with ground referenced signaling (GRS) over substrate	Electricity	0	Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.