John Zolnowsky
41Patents
22h-index
25Co-inventors
85Inventor score
Filing activity: Apr 2, 1980 → Aug 29, 2016
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5826081A | Real time thread dispatcher for multiprocessor applications | Physics | 147 | Expired |
| US4473878A | Memory management unit | Physics | 104 | Expired |
| US4524415A | Virtual machine data processor | Physics | 89 | Expired |
| US5991790A | Generation and delivery of signals in a two-level, multithreaded system | Physics | 74 | Expired |
| US6779182B1 | Real time thread dispatcher for multiprocessor applications | Physics | 73 | Expired |
| US4566063A | Data processor which can repeat the execution of instruction loops with minimal instruction fetches | Physics | 63 | Expired |
| US4890223A | Paged memory management unit which evaluates access permissions when creating translator | Physics | 60 | Expired |
| US4710866A | Method and apparatus for validating prefetched instruction | Physics | 57 | Expired |
| US4635193A | Data processor having selective breakpoint capability with minimal overhead | Physics | 55 | Expired |
| US4584640A | Method and apparatus for a compare and swap instruction | Physics | 53 | Expired |
| US4602327A | Bus master capable of relinquishing bus on request and retrying bus cycle | Physics | 50 | Expired |
| US4349873A | Microprocessor interrupt processing | Physics | 42 | Expired |
| US4800489A | Paged memory management unit capable of selectively supporting multiple address spaces | Physics | 40 | Expired |
| US4488256A | Memory management unit having means for detecting and preventing mapping conflicts | Physics | 39 | Expired |
| US4763250A | Paged memory management unit having variable number of translation table levels | Physics | 38 | Expired |
| US4763244A | Paged memory management unit capable of selectively supporting multiple address spaces | Physics | 37 | Expired |
| US4715013A | Coprocessor instruction format | Physics | 34 | Expired |
| US4729094A | Method and apparatus for coordinating execution of an instruction by a coprocessor | Physics | 30 | Expired |
| US4719567A | Method and apparatus for limiting bus utilization | Physics | 30 | Expired |
| US4493035A | Data processor version validation | Physics | 28 | Expired |
| US4750110A | Method and apparatus for executing an instruction contingent upon a condition present in another data processor | Physics | 26 | Expired |
| US4740889A | Cache disable for a data processor | Physics | 25 | Expired |
| US4488228A | Virtual memory data processor | Physics | 22 | Expired |
| US4731736A | Method and apparatus for coordinating execution of an instruction by a selected coprocessor | Physics | 22 | Expired |
| US4348722A | Bus error recognition for microprogrammed data processor | Physics | 18 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.