Joseph E. Farb
12Patents
9h-index
9Co-inventors
61Inventor score
Filing activity: Jul 22, 1985 → Sep 23, 1996
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5185535A | Control of backgate bias for low power high speed CMOS/SOI devices | Emerging Cross-Sectional Technologies | 77 | Expired |
| US5528067A | Magnetic field detection | Emerging Cross-Sectional Technologies | 62 | Expired |
| US5006477A | Method of making a latch up free, high voltage, CMOS bulk process for sub-half micron devices | Emerging Cross-Sectional Technologies | 37 | Expired |
| US5028564A | Edge doping processes for mesa structures in SOS and SOI devices | Emerging Cross-Sectional Technologies | 34 | Expired |
| US5352914A | Field-effect transistor with structure for suppressing hot-electron effects, and method of fabricating the transistor | Electricity | 18 | Expired |
| US5006480A | Metal gate capacitor fabricated with a silicon gate MOS process | Electricity | 15 | Expired |
| US5260227A | Method of making a self aligned static induction transistor | Electricity | 14 | Expired |
| US4837051A | Conductive plug for contacts and vias on integrated circuits | Electricity | 11 | Expired |
| US5527721A | Method of making FET with two reverse biased junctions in drain region | Electricity | 10 | Expired |
| US4713329A | Well mask for CMOS process | Electricity | 9 | Expired |
| US5686330A | Method of making a self-aligned static induction transistor | Electricity | 7 | Expired |
| US5511036A | Flash EEPROM cell and array with bifurcated floating gates | Electricity | 6 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.