Jürgen Schredl
7Patents
2h-index
11Co-inventors
48Inventor score
Filing activity: Feb 26, 1999 → May 17, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9196554B2 | Electronic component, arrangement and method | Electricity | 2 | Active |
| US6328200A | Process for selective soldering | Electricity | 2 | Expired |
| US9196577B2 | Semiconductor packaging arrangement | Electricity | 1 | Active |
| US11355460B1 | Molded semiconductor package with high voltage isolation | Electricity | 1 | Active |
| US9099391B2 | Semiconductor package with top-side insulation layer | Electricity | 0 | Active |
| US10109609B2 | Connection structure and electronic component | Electricity | 0 | Active |
| US11817407B2 | Molded semiconductor package with high voltage isolation | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.