Keith E. Downes
13Patents
4h-index
17Co-inventors
53Inventor score
Filing activity: May 13, 2004 → Jan 28, 2014
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8236663B2 | Dual-damascene process to fabricate thick wire structure | Electricity | 14 | Active |
| US7361950B2 | Integration of a MIM capacitor with a plate formed in a well region and with a high-k dielectric | Electricity | 12 | Expired |
| US7602068B2 | Dual-damascene process to fabricate thick wire structure | Electricity | 6 | Active |
| US7915134B2 | Method of integration of a MIM capacitor with a lower plate of metal gate material formed on an STI region or a silicide region formed in or on the surface of a doped well with a high K dielectric material | Electricity | 5 | Active |
| US9171778B2 | Dual-damascene process to fabricate thick wire structure | Electricity | 4 | Active |
| US7728372B2 | Method and structure for creation of a metal insulator metal capacitor | Electricity | 3 | Active |
| US7910450B2 | Method of fabricating a precision buried resistor | Electricity | 3 | Active |
| US8753950B2 | Dual-damascene process to fabricate thick wire structure | Electricity | 3 | Active |
| US7235487B2 | Metal seed layer deposition | Electricity | 2 | Expired |
| US7879716B2 | Metal seed layer deposition | Electricity | 1 | Active |
| US8207568B2 | Process for single and multiple level metal-insulator-metal integration with a single mask | Electricity | 1 | Active |
| US8435864B2 | Process for single and multiple level metal-insulator-metal integration with a single mask | Electricity | 0 | Active |
| US8227849B2 | Method and structure for creation of a metal insulator metal capacitor | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.