Kelwin Ko
9Patents
4h-index
25Co-inventors
49Inventor score
Filing activity: Dec 9, 1998 → Jan 22, 2004
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6583009B1 | Innovative narrow gate formation for floating gate flash technology | Emerging Cross-Sectional Technologies | 31 | Expired |
| US6143608A | Barrier layer decreases nitrogen contamination of peripheral gate regions during tunnel oxide nitridation | Electricity | 25 | Expired |
| US6613657B1 | BPSG, SA-CVD liner/P-HDP gap fill | Electricity | 18 | Expired |
| US6808992B1 | Method and system for tailoring core and periphery cells in a nonvolatile memory | Electricity | 10 | Expired |
| US7060564B1 | Memory device and method of simultaneous fabrication of core and periphery of same | Electricity | 4 | Expired |
| US6806155B1 | Method and system for scaling nonvolatile memory cells | Electricity | 4 | Expired |
| US7301193B2 | Structure and method for low Vss resistance and reduced DIBL in a floating gate memory cell | Electricity | 2 | Expired |
| US6974995B1 | Method and system for forming dual gate structures in a nonvolatile memory using a protective layer | Electricity | 2 | Expired |
| US7071101B1 | Sacrificial TiN arc layer for increased pad etch throughput | Electricity | 0 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.