Matthew J. Totin
10Patents
0h-index
7Co-inventors
30Inventor score
Filing activity: Apr 13, 2022 → Nov 6, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US12125513B2 | System on chip (SOC) with processor and integrated ferroelectric memory | Physics | 0 | Active |
| US12373345B2 | Intelligent management of ferroelectric memory in a data storage device | Physics | 0 | Active |
| US12112821B2 | Read destructive memory wear leveling system | Physics | 0 | Active |
| US11868621B2 | Data storage with multi-level read destructive memory | Physics | 0 | Active |
| US12282681B2 | Balancing power, endurance and latency in a ferroelectric memory | Physics | 0 | Active |
| US11996144B2 | Non-volatile memory cell with multiple ferroelectric memory elements (FMEs) | Physics | 0 | Active |
| US11922055B2 | Stack register having different ferroelectric memory element constructions | Physics | 0 | Active |
| US11908504B2 | Front end buffer having ferroelectric field effect transistor (FeFET) based memory | Electricity | 0 | Active |
| US11899590B2 | Intelligent cache with read destructive memory cells | Physics | 0 | Active |
| US11853213B2 | Intelligent management of ferroelectric memory in a data storage device | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.