Ovadia Abed
13Patents
2h-index
21Co-inventors
46Inventor score
Filing activity: Oct 23, 2015 → Jun 10, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10026609B2 | Nanoshape patterning techniques that allow high-speed and low-cost fabrication of nanoshape structures | Emerging Cross-Sectional Technologies | 46 | Active |
| US9718096B2 | Programmable deposition of thin films of a user-defined profile with nanometer scale accuracy | Electricity | 21 | Active |
| US10336062B2 | Systems and methods for precision inkjet printing | Performing Operations; Transporting | 1 | Active |
| US12094775B2 | Nanoscale-aligned three-dimensional stacked integrated circuit | Electricity | 0 | Active |
| US11469131B2 | Heterogeneous integration of components onto compact devices using moire based metrology and vacuum based pick-and-place | Electricity | 0 | Active |
| US9972698B1 | Fabricating large area multi-tier nanostructures | Electricity | 0 | Active |
| US9972699B1 | Fabricating large area multi-tier nanostructures | Electricity | 0 | Active |
| US11669009B2 | Roll-to-roll programmable film imprint lithography | Physics | 0 | Active |
| US9941389B2 | Fabricating large area multi-tier nanostructures | Electricity | 0 | Active |
| US11762284B2 | Wafer-scale programmable films for semiconductor planarization and for imprint lithography | Physics | 0 | Active |
| US12009247B2 | Heterogeneous integration of components onto compact devices using moiré based metrology and vacuum based pick-and-place | Electricity | 0 | Active |
| US11600525B2 | Nanoscale-aligned three-dimensional stacked integrated circuit | Electricity | 0 | Active |
| US12308275B2 | Heterogeneous integration of components onto compact devices using moiré based metrology and vacuum based pick-and-place | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.