Patrick D. Gibson
26Patents
9h-index
32Co-inventors
75Inventor score
Filing activity: Jul 14, 1999 → May 14, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| USD789977S1 | Display screen with graphical user interface | General | 54 | Active |
| USD789978S1 | Display screen with graphical user interface | General | 41 | Active |
| US6931613B2 | Hierarchical feature extraction for electrical interaction calculations | Physics | 31 | Expired |
| US6868088B2 | Automatic detector of media interface protocol type | Electricity | 22 | Expired |
| US6418118B1 | Network device including selective discard of packets | Electricity | 22 | Expired |
| US6763031B1 | Network device incorporating selective compression of stored data packets | Electricity | 20 | Expired |
| US6661803B1 | Network switch including bandwidth controller | Electricity | 17 | Expired |
| US6625684B1 | Application specific integrated circuit with dual-mode system for externally accessible data buses and visibility buses | Physics | 14 | Expired |
| US6496478B1 | Method and apparatus for controlling traffic queues in network switches | Electricity | 10 | Expired |
| US7412675B2 | Hierarchical feature extraction for electrical interaction | Physics | 7 | Active |
| US7023873B2 | Network device including detection of link status employing auto-negotiation | Electricity | 7 | Expired |
| US6680908B1 | Network switch including bandwidth allocation controller | Electricity | 6 | Expired |
| US8863051B2 | Hierarchical feature extraction for electrical interaction calculations | Physics | 6 | Active |
| US7716614B2 | Hierarchical feature extraction for electrical interaction calculations | Physics | 4 | Active |
| US8510690B2 | Hierarchical feature extraction for electrical interaction calculations | Physics | 4 | Active |
| US10596219B2 | Logic-driven layout verification | Physics | 2 | Active |
| US10055533B2 | Visualization of analysis process parameters for layout-based checks | Physics | 1 | Active |
| US10783291B2 | Hybrid performance of electronic design automation (EDA) procedures with delayed acquisition of remote resources | Physics | 1 | Active |
| US9135391B2 | Determination of electromigration susceptibility based on hydrostatic stress analysis | Physics | 1 | Active |
| US10769340B2 | Automatic moving of probe locations for parasitic extraction | Physics | 0 | Active |
| US6839360B2 | FIFO storage including pointer misalignment detection | Electricity | 0 | Expired |
| US10546082B1 | Resistor network reduction for full-chip simulation of current density | Physics | 0 | Active |
| US10210302B2 | Electrostatic damage protection circuitry verification | Physics | 0 | Active |
| US11954419B2 | Dynamic allocation of computing resources for electronic design automation operations | Physics | 0 | Active |
| US11294729B2 | Resource provisioning for multiple invocations to an electronic design automation application | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.