Inventor · Mountain View, CA, US

Paul A. Lassa

20Patents
8h-index
16Co-inventors
64Inventor score

Filing activity: Dec 31, 2006 → Mar 2, 2015

Most-cited inventions

PatentTitleAreaCited byStatus
US8443263B2 Method and controller for performing a copy-back operation Physics 102 Active
US8694719B2 Controller, storage device, and method for power throttling memory operations Emerging Cross-Sectional Technologies 65 Active
US9003102B2 Controller with extended status register and method of use therewith Physics 20 Active
US8700961B2 Controller and method for virtual LUN assignment for improved memory bank mapping Physics 17 Active
US8760922B2 System and method for micro-tiering in non-volatile memory Physics 12 Active
US8819328B2 Controller and method for performing background operations Emerging Cross-Sectional Technologies 11 Active
US8745369B2 Method and memory system for managing power based on semaphores and timers Emerging Cross-Sectional Technologies 10 Active
US9116620B2 Controller and method for memory aliasing for different flash memory types Physics 10 Active
US9329804B2 System and method for micro-tiering in non-volatile memory Physics 6 Active
US8924631B2 Method and system for random write unalignment handling Physics 5 Active
US7802034B2 Method for performing full transfer automation in a USB controller Physics 3 Active
US9229655B2 Controller and method for performing background operations Emerging Cross-Sectional Technologies 3 Active
US9141308B2 Controller and method for using a transaction flag for page protection Physics 2 Active
US7928746B1 Exclusive-option chips and methods with all-options-active test mode Physics 2 Active
US9372632B2 Controller with extended status register and method of use therewith Physics 2 Active
US8135944B2 Selectively powered data interfaces Emerging Cross-Sectional Technologies 1 Active
US8102062B1 Optionally bonding either two sides or more sides of integrated circuits Electricity 1 Active
USRE46013E1 Method and controller for performing a copy-back operation General 1 Active
US8304813B2 Connection between an I/O region and the core region of an integrated circuit Electricity 0 Active
US8558566B2 Exclusive-option chips and methods with all-options-active test mode Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.