Inventor · Barcelona, ES

Roger Espasa

17Patents

3h-index

34Co-inventors

56Inventor score

Filing activity: Oct 21, 2005 → Dec 19, 2016

Most-cited inventions

Patent	Title	Area	Cited by	Status
US7627735B2	Implementing vector memory operations	Emerging Cross-Sectional Technologies	38	Active
US8533436B2	Adaptively handling remote atomic execution based upon contention prediction	Physics	16	Active
US9785433B2	Three source operand floating-point addition instruction with operand negation bits and intermediate and final result rounding	Physics	8	Active
US9436468B2	Technique for setting a vector mask	Physics	3	Expired
US8707012B2	Implementing vector memory operations	Emerging Cross-Sectional Technologies	3	Active
US9733935B2	Super multiply add (super madd) instruction	Physics	2	Active
US8316216B2	Implementing vector memory operations	Emerging Cross-Sectional Technologies	2	Active
US10445092B2	Method and apparatus for performing a vector permute with an index and an immediate	Physics	2	Active
US9244855B2	Method, system, and apparatus for page sizing extension	Physics	2	Active
US9606931B2	Indicating a length of an instruction of a variable length instruction set	Physics	1	Active
US9934155B2	Method, system, and apparatus for page sizing extension	Physics	1	Active
US10445245B2	Method, system, and apparatus for page sizing extension	Physics	0	Active
US9654143B2	Consecutive bit error detection and correction	Electricity	0	Active
US10296489B2	Method and apparatus for performing a vector bit shuffle	Physics	0	Active
US10713044B2	Bit shuffle processors, methods, systems, and instructions	Physics	0	Active
US10445244B2	Method, system, and apparatus for page sizing extension	Physics	0	Active
US10296334B2	Method and apparatus for performing a vector bit gather	Physics	0	Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.