Roger May
24Patents
10h-index
20Co-inventors
75Inventor score
Filing activity: Feb 24, 1986 → Sep 27, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7340596B1 | Embedded processor with watchdog timer for programmable logic | Physics | 86 | Expired |
| US7350178B1 | Embedded processor with watchdog timer for programmable logic | Physics | 53 | Expired |
| US6745369B1 | Bus architecture for system on a chip | Physics | 52 | Expired |
| US4679086A | Motion sensitive frame integration | Electricity | 38 | Expired |
| US4814884A | Window generator | Physics | 29 | Expired |
| US6732263B1 | Configuring both a programmable logic device and its embedded logic with a single serialized configuration bit stream | Physics | 28 | Expired |
| US6803785B1 | I/O circuitry shared between processor and programmable logic portions of an integrated circuit | Physics | 20 | Expired |
| US4928258A | Recursive median filtering | Electricity | 18 | Expired |
| US7096324B1 | Embedded processor with dual-port SRAM for programmable logic | Physics | 17 | Expired |
| US7026840B1 | Programmable logic device | Electricity | 14 | Expired |
| USH713H | Automatic target detection and recognition | General | 10 | Active |
| US7546424B1 | Embedded processor with dual-port SRAM for programmable logic | Physics | 8 | Active |
| US6980024B1 | I/O circuitry shared between processor and programmable logic portions of an integrated circuit | Physics | 6 | Expired |
| US7917706B1 | SDRAM controller | Physics | 4 | Expired |
| US7343483B1 | Configuring both a programmable logic device and its embedded logic with a single serialized configuration bit stream | Physics | 3 | Expired |
| US6937061B1 | Address decoder for programmable logic device | Physics | 3 | Expired |
| US7081773B1 | Updating configuration for programmable logic device | Electricity | 3 | Expired |
| US10018675B1 | Testing an integrated circuit in user mode using partial reconfiguration | Physics | 2 | Active |
| US7446561B2 | I/O circuitry shared between processor and programmable logic portions of an integrated circuit | Physics | 1 | Expired |
| US8190828B1 | Embedded processor with dual-port SRAM for programmable logic | Physics | 1 | Active |
| US11841776B2 | Single chip multi-die architecture having safety-compliant cross-monitoring capability | Physics | 1 | Active |
| US9082199B1 | Video processing architecture | Electricity | 0 | Active |
| US7064578B1 | Distributed bus structure | Electricity | 0 | Expired |
| US11360846B2 | Two die system on chip (SoC) for providing hardware fault tolerance (HFT) for a paired SoC | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.