Inventor · Cupertino, CA, US

Simon Li

27Patents
4h-index
31Co-inventors
63Inventor score

Filing activity: Dec 20, 1995 → Jan 26, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US7346819B2 Through-core self-test with multiple loopbacks Physics 76 Expired
US5684332A Method of packaging a semiconductor device with minimum bonding pad pitch and packaged device therefrom Electricity 21 Expired
US9515204B2 Synchronous wired-or ACK status for memory with variable write latency Emerging Cross-Sectional Technologies 5 Active
US8661615B1 Pintle assembly Performing Operations; Transporting 4 Active
US8279948B2 Interface with variable data rate Emerging Cross-Sectional Technologies 3 Active
US10367636B2 Phase calibration of clock signals Electricity 3 Active
US9553380B2 Card connector Electricity 2 Active
US9330034B2 Levelization of memory interface for communicating with multiple memory devices Physics 2 Active
US9755819B2 Phase calibration of clock signals Electricity 1 Active
US10129015B2 Phase calibration of clock signals Electricity 1 Active
US10452601B2 Interface with variable data rate Emerging Cross-Sectional Technologies 0 Active
US9940299B2 Interface with variable data rate Emerging Cross-Sectional Technologies 0 Active
US11973153B2 Synchronous wired-or ACK status for memory with variable write latency Emerging Cross-Sectional Technologies 0 Active
US11184198B2 Serial link receiver with improved bandwidth and accurate eye monitor Electricity 0 Active
US11341079B2 Interface with variable data rate Emerging Cross-Sectional Technologies 0 Active
US9036436B2 Supporting calibration for sub-rate operation in clocked memory systems Physics 0 Active
US8855217B2 Interface with variable data rate Emerging Cross-Sectional Technologies 0 Active
US10135642B2 Serial link receiver with improved bandwidth and accurate eye monitor Electricity 0 Active
US9178647B2 Interface with variable data rate Emerging Cross-Sectional Technologies 0 Active
US10468544B2 Synchronous wired-OR ACK status for memory with variable write latency Emerging Cross-Sectional Technologies 0 Active
US9349422B2 Supporting calibration for sub-rate operation in clocked memory systems Physics 0 Active
US11838153B1 Digital signal processors providing scalable decision feedback equalization (DFE) employing sequence selection and related methods Electricity 0 Active
US11886375B2 Interface with variable data rate Emerging Cross-Sectional Technologies 0 Active
US9569396B2 Interface with variable data rate Emerging Cross-Sectional Technologies 0 Active
US10601615B2 Serial link receiver with improved bandwidth and accurate eye monitor Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.