Uk-Rae Cho
49Patents
12h-index
41Co-inventors
81Inventor score
Filing activity: Sep 15, 1988 → Mar 31, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6573746B2 | Impedance control circuit | Physics | 75 | Expired |
| US6525558B2 | Programmable impedance control circuit | Electricity | 61 | Expired |
| US6661250B2 | Programmable impedance control circuit | Electricity | 47 | Expired |
| US6901014B2 | Circuits and methods for screening for defective memory cells in semiconductor memory devices | Physics | 43 | Expired |
| US6947336B2 | Semiconductor device with impedance control circuit | Physics | 37 | Expired |
| US6839286B2 | Semiconductor device with programmable impedance control circuit | Physics | 35 | Expired |
| US6456124B1 | Method and apparatus for controlling impedance of an off-chip driver circuit | Electricity | 34 | Expired |
| US6429679B1 | Programmable impedance control circuit and method thereof | Electricity | 31 | Expired |
| US6642740B2 | Programmable termination circuit and method | Electricity | 30 | Expired |
| US6594818B2 | Memory architecture permitting selection of storage density after fabrication of active circuitry | Electricity | 20 | Expired |
| US7525173B2 | Layout structure of MOS transistors on an active region | Electricity | 15 | Active |
| US9318607B2 | Semiconductor device and method of fabricating the same | Electricity | 13 | Active |
| US7307441B2 | Integrated circuit chips and wafers including on-chip test element group circuits, and methods of fabricating and testing same | Electricity | 12 | Expired |
| US7825710B2 | Delay-locked loop circuits and method for generating transmission core clock signals | Electricity | 11 | Expired |
| US6556038B2 | Impedance updating apparatus of termination circuit and impedance updating method thereof | Electricity | 9 | Expired |
| US6617894B2 | Circuits and methods for generating internal clock signal of intermediate phase relative to external clock | Electricity | 8 | Expired |
| US7616512B2 | Semiconductor memory device with hierarchical bit line structure | Physics | 8 | Active |
| US6785173B2 | Semiconductor memory device capable of performing high-frequency wafer test operation | Physics | 8 | Expired |
| US7002822B2 | Content addressable memory device | Physics | 7 | Expired |
| US7295489B2 | Method and circuit for writing double data rate (DDR) sampled data in a memory device | Physics | 7 | Expired |
| US7489570B2 | Semiconductor memory device with hierarchical bit line structure | Physics | 7 | Active |
| US6583647B2 | Signal converting system having level converter for use in high speed semiconductor device and method therefor | Electricity | 6 | Expired |
| US4912055A | Method of fabricating a semiconductor device | Electricity | 6 | Expired |
| US4970174A | Method for making a BiCMOS semiconductor device | Emerging Cross-Sectional Technologies | 6 | Expired |
| US6930508B2 | Integrated circuit with on-chip termination | Electricity | 6 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.