Uri Weiser
14Patents
6h-index
26Co-inventors
66Inventor score
Filing activity: Dec 10, 1990 → Sep 8, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5381533A | Dynamic flow instruction cache memory organized around trace segments independent of virtual address line | Physics | 134 | Expired |
| US5265213A | Pipeline system for executing predicted branch target instruction in a cycle concurrently with the execution of branch instruction | Physics | 88 | Expired |
| US5442756A | Branch prediction and resolution apparatus for a superscalar computer processor | Physics | 75 | Expired |
| US5606676A | Branch prediction and resolution apparatus for a superscalar computer processor | Physics | 69 | Expired |
| US5450605A | Boundary markers for indicating the boundary of a variable length instruction to facilitate parallel processing of sequential instructions | Physics | 45 | Expired |
| US8209457B2 | Systems and methods for efficient handling of data traffic and processing within a processing device | Emerging Cross-Sectional Technologies | 12 | Active |
| US9003421B2 | Acceleration threads on idle OS-visible thread execution units | Physics | 4 | Active |
| US7793032B2 | Systems and methods for efficient handling of data traffic and processing within a processing device | Emerging Cross-Sectional Technologies | 2 | Active |
| US12386683B2 | Non-blocking simultaneous multithreading (NB-SMT) | Emerging Cross-Sectional Technologies | 0 | Active |
| US10878906B2 | Resistive address decoder and virtually addressed memory | Physics | 0 | Active |
| US9268729B2 | Systems and methods for efficient handling of data traffic and processing within a processing device | Emerging Cross-Sectional Technologies | 0 | Active |
| US10521237B2 | Memristor based multithreading | Electricity | 0 | Active |
| US12260248B2 | Systems and methods for performing multiplication of one or more matrices using multi-thread systolic arrays | Physics | 0 | Active |
| US10417005B2 | Multi-multidimensional computer architecture for big data applications | Emerging Cross-Sectional Technologies | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.