Patent · US Active

Frequent data value compression for graphics processing units

US10262388B2 · kind B2 · utility

0Cited by

1References

32Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Saurabh Sharma · Santa Clara, US
Abhishek Venkatesh · Hillsboro, US
Travis T. Schluessler · Hillsboro, US
Prasoonkumar Surti · Folsom, US
Altug Koker · Cameron Park, US
Aravindh Anantaraman · Folsom, US
Pattabhiraman P. K. · Bengaluru, IN
Abhishek R. Appu · Cameron Park, US
Joydeep Ray · Folsom, US
Kamal Sinha · Rancho Cordova, US
Vasanth Ranganathan · Cameron Park, US
Bhushan M. Borole · Rancho Cordova, US
Wenyin Fu · Folsom, US
Eric J. Hoekstra · Holland, US
Linda L. Hurd · Auburn Lake Trails, US

Key dates

Filing date	Apr 10, 2017
Grant date	Apr 16, 2019
Priority date	—
Expiry date	Apr 14, 2037

Classification

Technology area (CPC G)Physics
CPC primaryG06T15/005
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A control surface tracks an individual cacheline in the original surface for frequent data values. If so, control surface bits are set. When reading a cacheline from memory, first the control surface bits are read. If they happen to be set, then the original memory read is skipped altogether and instead the bits from the control surface provide the value for the entire cacheline.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.