Contacting source and drain of a transistor device
US10468300B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 5, 2017 |
| Grant date | Nov 5, 2019 |
| Priority date | — |
| Expiry date | Jul 23, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0133
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor device is provided including forming raised source and drain regions on a semiconductor layer, forming a first insulating layer over the semiconductor layer, forming a first contact to one of the source and drain regions in the first insulating layer, forming a second insulating layer over the first contact, forming a trench in the second insulating layer to expose the first contact, removing a portion of the first contact below the trench, thereby forming a recessed surface of the first contact, removing a portion of the first insulating layer, thereby forming a recess in the trench and exposing a portion of a sidewall of the first contact below the recessed surface of the first contact, and filling the trench and the recess formed in the trench with a contact material to form a second contact in contact with the first contact.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.