Hybrid low power homogenous grapics processing units
US10521271B2 · kind B2 · utility
0Cited by
1References
10Claims
0Family size
Assignee
Inventors
- Abhishek R. Appu
- Altug Koker
- Balaji Vembu
- Joydeep Ray
- Kamal Sinha
- Prasoonkumar Surti
- Kiran C. Veernapu
- Subramaniam Maiyuran
- Sanjeev Jahagirdar
- Eric J. Asperheim
- Guei-Yuan Lueh
- David Puffer
- Wenyin Fu
- Nikos Kaburlasos
- Bhushan M. Borole
- Josh B. Mastronarde
- Linda L. Hurd
- Travis T. Schluessler
- Tomasz Janczak
- Abhishek Venkatesh
- Kai Xiao
- Slawomir Grajewski
Key dates
| Filing date | Apr 1, 2017 |
| Grant date | Dec 31, 2019 |
| Priority date | — |
| Expiry date | Apr 1, 2037 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In an example, an apparatus comprises a plurality of execution units comprising at least a first type of execution unit and a second type of execution unit and logic, at least partially including hardware logic, to analyze a workload and assign the workload to one of the first type of execution unit or the second type of execution unit. Other embodiments are also disclosed and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.