Super long channel device within VFET architecture
US10833190B2 · kind B2 · utility
3Cited by
8References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 19, 2019 |
| Grant date | Nov 10, 2020 |
| Priority date | — |
| Expiry date | Jul 19, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/693
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Embodiments are directed to methods and resulting structures for a vertical field effect transistor (VFET) having a super long channel. A pair of semiconductor fins is formed on a substrate. A semiconductor pillar is formed between the semiconductor fins on the substrate. A region that extends under all of the semiconductor fins and under part of the semiconductor pillar is doped. A conductive gate is formed over a channel region of the semiconductor fins and the semiconductor pillar. A surface of the semiconductor pillar serves as an extended channel region when the gate is active.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.