Methods of forming a silicon-insulator layer and semiconductor device having the same

US11195713B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Joachim Hirschler · Villach, AT
• Georg Ehrentraut · Villach, AT
• Christoffer Erbert · Duel, AT
• Klaus Goeschl · Klagenfurt, AT
• Markus Heinrici · Klagenfurt, AT
• Michael Hutzler · Villach, AT
• Wolfgang Koell · Ledenitzen, AT
• Stefan Krivec · Villach, AT
• Ingmar Neumann · Villach, AT
• Mathias Plappert · Finkenstein, AT
• Michael Roesner · Villach, AT
• Olaf Storbeck · Dresden, DE

Key dates

• Filing date: May 30, 2019
• Grant date: Dec 7, 2021
• Expiry date: Jun 18, 2039

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/027
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

In one aspect, a method of forming a silicon-insulator layer is provided. The method includes arranging a silicon structure in a plasma etch process chamber and applying a plasma to the silicon structure in the plasma etch process chamber at a temperature of the silicon structure equal to or below 100° C. The plasma includes a component and a halogen derivate, thereby forming the silicon-insulator layer. The silicon-insulator layer includes silicon and the component. In another aspect, a semiconductor device is provided having a silicon-insulator layer formed by the method.