Flat lead package formation method
US11652084B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 23, 2020 |
| Grant date | May 16, 2023 |
| Priority date | — |
| Expiry date | Feb 13, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor package includes providing a panel, providing one or more metal layers on an upper surface of the panel, forming a die pad and bond pads from the one or more metal layers, the die pad being adjacent to and spaced apart from the bond pads, attaching a die to the die pad, forming electrical connections between the die and the bond pads, encapsulating the die and the electrical connections with an electrically insulating mold compound, removing portions of the panel, and exposing the die pad and the bond pads after encapsulating the die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.