Method and apparatus for storage of test results within an integrated circuit
US6365421B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 20, 2000 |
| Grant date | Apr 2, 2002 |
| Priority date | — |
| Expiry date | Mar 20, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31702
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An integrated circuit memory device has a plurality of nonvolatile programmable elements which are used to store a pass/fail status bit at selected milestones in a test sequence. At selected points in the test process an element may be programmed to indicate that the device has passed the tests associated with the selected point in the process. Prior to performing further tests on the device, the element is read to verify that it passed previous tests in the test process. If the appropriate elements are not programmed, the device is rejected. A rejected device may be retested according to the previous test steps. Laser fuses, electrically programmable fuses or antifuses are used to store test results. The use of electrically writeable nonvolatile memory elements allows for programming of the elements after the device has been packaged.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.