Method to create copper traps by modifying treatment on the dielectrics surface
US6429117B1 · kind B1 · utility
8Cited by
10References
34Claims
0Family size
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Key dates
| Filing date | Jul 19, 2000 |
| Grant date | Aug 6, 2002 |
| Priority date | — |
| Expiry date | Aug 21, 2020 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/958
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of preventing metal penetration and diffusion from metal structures formed over a semiconductor structure, comprising the following steps. A semiconductor structure including a patterned dielectric layer is provided. The patterned dielectric layer includes an opening and an upper surface. The dielectric layer surface is then passivated to form a passivation layer. A metal plug is formed within the dielectric layer opening. The passivation layer prevents penetration and diffusion of metal out from the metal plug into the semiconductor structure and the patterned dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.