Subhash Gupta
100Patents
29h-index
75Co-inventors
93Inventor score
Filing activity: Feb 3, 1978 → Nov 15, 2004
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5926690A | Run-to-run control process for controlling critical dimensions | Electricity | 203 | Expired |
| US5255184A | Airline seat inventory control method and apparatus for computerized airline reservation systems | Physics | 202 | Expired |
| US6348407B1 | Method to improve adhesion of organic dielectrics in dual damascene interconnects | Electricity | 198 | Expired |
| US5265006A | Demand scheduled partial carrier load planning system for the transportation industry | Physics | 185 | Expired |
| US5614765A | Self aligned via dual damascene | Electricity | 125 | Expired |
| US5705430A | Dual damascene with a sacrificial via fill | Electricity | 113 | Expired |
| US5260868A | Method for calendaring future events in real-time | Emerging Cross-Sectional Technologies | 110 | Expired |
| US6284657A | Non-metallic barrier formation for copper damascene type interconnects | Electricity | 107 | Expired |
| US6352917B1 | Reversed damascene process for multiple level metal interconnects | Electricity | 106 | Expired |
| US5795823A | Self aligned via dual damascene | Electricity | 79 | Expired |
| US6184138A | Method to create a controllable and reproducible dual copper damascene structure | Electricity | 74 | Expired |
| US6114243A | Method to avoid copper contamination on the sidewall of a via or a dual damascene structure | Electricity | 64 | Expired |
| US5686354A | Dual damascene with a protective mask for via etching | Electricity | 63 | Expired |
| US4888692A | Real-time scheduling system | Emerging Cross-Sectional Technologies | 59 | Expired |
| US5691238A | Subtractive dual damascene | Electricity | 57 | Expired |
| US6274499A | Method to avoid copper contamination during copper etching and CMP | Electricity | 48 | Expired |
| US6380087B1 | CMP process utilizing dummy plugs in damascene process | Emerging Cross-Sectional Technologies | 48 | Expired |
| US6372636B1 | Composite silicon-metal nitride barrier to prevent formation of metal fluorides in copper damascene | Electricity | 43 | Expired |
| US5037506A | Method of stripping layers of organic materials | Emerging Cross-Sectional Technologies | 42 | Expired |
| US6040619A | Semiconductor device including antireflective etch stop layer | Electricity | 40 | Expired |
| US5910453A | Deep UV anti-reflection coating etch | Electricity | 37 | Expired |
| US5746884A | Fluted via formation for superior metal step coverage | Electricity | 35 | Expired |
| US5770519A | Copper reservoir for reducing electromigration effects associated with a conductive via in a semiconductor device | Electricity | 35 | Expired |
| US6225221A | Method to deposit a copper seed layer for dual damascene interconnects | Electricity | 33 | Expired |
| US4962064A | Method of planarization of topologies in integrated circuit structures | Emerging Cross-Sectional Technologies | 32 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.