Simon Chooi
94Patents
25h-index
61Co-inventors
87Inventor score
Filing activity: Jan 18, 1996 → Dec 3, 2009
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6348407B1 | Method to improve adhesion of organic dielectrics in dual damascene interconnects | Electricity | 198 | Expired |
| US6040243A | Method to form copper damascene interconnects using a reverse barrier metal scheme to eliminate copper diffusion | Electricity | 148 | Expired |
| US6376353B1 | Aluminum and copper bimetallic bond pad scheme for copper damascene interconnects | Electricity | 141 | Expired |
| US6436824B1 | Low dielectric constant materials for copper damascene | Electricity | 111 | Expired |
| US6284657A | Non-metallic barrier formation for copper damascene type interconnects | Electricity | 107 | Expired |
| US6352917B1 | Reversed damascene process for multiple level metal interconnects | Electricity | 106 | Expired |
| US6265321A | Air bridge process for forming air gaps | Electricity | 78 | Expired |
| US6287979A | Method for forming an air gap as low dielectric constant material using buckminsterfullerene as a porogen in an air bridge or a sacrificial layer | Emerging Cross-Sectional Technologies | 78 | Expired |
| US6358842B1 | Method to form damascene interconnects with sidewall passivation to protect organic dielectrics | Electricity | 75 | Expired |
| US6424044B1 | Use of boron carbide as an etch-stop and barrier layer for copper dual damascene metallization | Electricity | 68 | Expired |
| US6475908B1 | Dual metal gate process: metals and their silicides | Electricity | 62 | Expired |
| US6331479A | Method to prevent degradation of low dielectric constant material in copper damascene interconnects | Electricity | 52 | Expired |
| US6458695B1 | Methods to form dual metal gates by incorporating metals and their conductive oxides | Electricity | 46 | Expired |
| US6372636B1 | Composite silicon-metal nitride barrier to prevent formation of metal fluorides in copper damascene | Electricity | 43 | Expired |
| US5858870A | Methods for gap fill and planarization of intermetal dielectrics | Electricity | 43 | Expired |
| US6165891A | Damascene structure with reduced capacitance using a carbon nitride, boron nitride, or boron carbon nitride passivation layer, etch stop layer, and/or cap layer | Electricity | 42 | Expired |
| US6303447A | Method for forming an extended metal gate using a damascene process | Electricity | 33 | Expired |
| US6352921B1 | Use of boron carbide as an etch-stop and barrier layer for copper dual damascene metallization | Electricity | 32 | Expired |
| US6486080B2 | Method to form zirconium oxide and hafnium oxide for high dielectric constant materials | Electricity | 32 | Expired |
| US6350675B1 | Integration of silicon-rich material in the self-aligned via approach of dual damascene interconnects | Electricity | 31 | Expired |
| US6530380B1 | Method for selective oxide etching in pre-metal deposition | Electricity | 30 | Expired |
| US6683002B1 | Method to create a copper diffusion deterrent interface | Electricity | 29 | Expired |
| US6750519B2 | Dual metal gate process: metals and their silicides | Electricity | 25 | Expired |
| US6261942A | Dual metal-oxide layer as air bridge | Electricity | 25 | Expired |
| US6378759B1 | Method of application of conductive cap-layer in flip-chip, COB, and micro metal bonding | Electricity | 25 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.