Method of manufacturing spacer etch mask for silicon-oxide-nitride-oxide-silicon (SONOS) type nonvolatile memory

US6465303B1 · kind B1 · utility

Assignee

• Advanced Micro Devices, Inc. · US

Inventors

• Mark T. Ramsbey · Sunnyvale, US
• Narbeh Derhacobian · Belmont, US
• Janet Wang · San Francisco, US
• Angela T. Hui · Fremont, US
• Tuan Pham · Santa Clara, US
• Ravi Sunkavalli · Santa Clara, US
• Mark Randolph · San Jose, US

Key dates

• Filing date: Jun 20, 2001
• Grant date: Oct 15, 2002
• Expiry date: Jun 20, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B43/40

Abstract

One aspect of the present invention relates to a method of forming spacers in a silicon-oxide-nitride-oxide-silicon (SONOS) type nonvolatile semiconductor memory device, involving the steps of providing a semiconductor substrate having a core region and periphery region, the core region containing SONOS type memory cells and the periphery region containing gate transistors; implanting a first implant into the core region and a first implant into the periphery region of the semiconductor substrate; forming a spacer material over the semiconductor substrate; masking the core region and forming spacers adjacent the gate transistors in the periphery region; and implanting a second implant into the periphery region of the semiconductor substrate.