Method for forming a semiconductor device having a strained channel and a heterojunction source/drain

US7018901B1 · kind B1 · utility

Assignee

• Freeescale Semiconductor, Inc. · US

Inventors

• Voon-Yew Thean · Fishkill, US
• Mariam Sadaka · Austin, US
• Ted R. White · Austin, US
• Alexander L. Barr · Austin, US
• Venkat R. Kolagunta · Austin, US
• Bich-Yen Nguyen · Austin, US
• Victor H. Vartanian · Dripping Springs, US
• Da Zhang · New Taipei, TW

Key dates

• Filing date: Sep 29, 2004
• Grant date: Mar 28, 2006
• Expiry date: Sep 29, 2024

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/0212
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A semiconductor device (10) is formed by positioning a gate (22) overlying a semiconductor layer (16) of preferably silicon. A semiconductor material (26) of, for example only, SiGe or Ge, is formed adjacent the gate over the semiconductor layer and over source/drain regions. A thermal process diffuses the stressor material into the semiconductor layer. Lateral diffusion occurs to cause the formation of a strained channel (17) in which a stressor material layer (30) is immediately adjacent the strained channel. Extension implants create source and drain implants from a first portion of the stressor material layer. A second portion of the stressor material layer remains in the channel between the strained channel and the source and drain implants. A heterojunction is therefore formed in the strained channel. In another form, oxidation of the stressor material occurs rather than extension implants to form the strained channel.