Channel orientation to enhance transistor performance

US7160769B2 · kind B2 · utility

Assignee

• Freeescale Semiconductor, Inc. · US

Inventors

• Ted R. White · Austin, US
• Alexander L. Barr · Austin, US
• Dejan Jovanovic · Austin, US
• Bich-Yen Nguyen · Austin, US
• Mariam Sadaka · Austin, US
• Voon-Yew Thean · Fishkill, US

Key dates

• Filing date: Oct 20, 2004
• Grant date: Jan 9, 2007
• Expiry date: Jun 19, 2025

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/85

Abstract

P channel transistors are formed in a semiconductor layer that has a (110) surface orientation for enhancing P channel transistor performance, and the N channel transistors are formed in a semiconductor layer that has a (100) surface orientation. To further provide P channel transistor performance enhancement, the direction of their channel lengths is selected based on their channel direction. The narrow width P channel transistors are preferably oriented in the <100> direction. The wide channel width P channel transistors are preferably oriented in the <110> direction.