Integrated circuit package stacking system
US8004093B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 1, 2008 |
| Grant date | Aug 23, 2011 |
| Priority date | — |
| Expiry date | Aug 25, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit package stacking system includes: forming a flexible substrate by: providing an insulating material, forming a stacking pad on the insulating material, forming a coupling pad on the insulating material, and forming a trace between the stacking pad and the coupling pad; providing a package substrate; coupling an integrated circuit to the package substrate; and applying a conductive adhesive on the package substrate for positioning the flexible substrate over the integrated circuit and coupling the flexible substrate on the conductive adhesive.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.