Metal gate integration structure and method including metal fuse, anti-fuse and/or resistor
US8159040B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 13, 2008 |
| Grant date | Apr 17, 2012 |
| Priority date | — |
| Expiry date | Feb 22, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure and a method for fabricating the semiconductor structure provide a field effect device located and formed upon an active region of a semiconductor substrate and at least one of a fuse structure, an anti-fuse structure and a resistor structure located and formed at least in part simultaneously upon an isolation region laterally separated from the active region within the semiconductor substrate. The field effect device includes a gate dielectric comprising a high dielectric constant dielectric material and a gate electrode comprising a metal material. The at least one of the fuse structure, anti-fuse structure and resistor structure includes a pad dielectric comprising the same material as the gate dielectric, and optionally, also a fuse, anti-fuse or resistor that may comprise the same metal material as the gate electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.