Damascene metal-insulator-metal (MIM) device with improved scaleability
US8232175B2 · kind B2 · utility
0Cited by
5References
11Claims
0Family size
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Key dates
| Filing date | Sep 14, 2006 |
| Grant date | Jul 31, 2012 |
| Priority date | — |
| Expiry date | Sep 14, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8833
Abstract
A present method of fabricating a memory device includes the steps of providing a dielectric layer, providing an opening in the dielectric layer, providing a first conductive body in the opening, providing a switching body in the opening, the first conductive body and switching body filling the opening, and providing a second conductive body over the switching body. In an alternate embodiment, a second dielectric layer is provided over the first-mentioned dielectric layer, and the switching body is provided in an opening in the second dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.