Electronic fuse vias in interconnect structures

US8916461B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Junjing Bao · Fishkill, US
• Griselda Bonilla · Hopewell Junction, US
• Samuel S. Choi · Hopewell Junction, US
• Daniel C. Edelstein · White Plains, US
• Ronald G. Filippi · Wappingers Falls, US
• Naftali E. Lustig · Ossining, US
• Andrew H. Simon · Fishkill, US

Key dates

• Filing date: Sep 20, 2012
• Grant date: Dec 23, 2014
• Expiry date: Dec 1, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/0002
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

An electronic fuse and method for forming the same. Embodiments of the invention include e-fuses having a first metallization level including a metal structure, a second metallization level above the first metallization level, a metal via in the second metallization level, an interface region where the metal via meets the first metallization level, and a damaged region at the interface region. Embodiments further include a method including providing a first metallization level including a metal structure, forming a capping layer on the first metallization level, forming an opening in the capping layer that exposes a portion of the metal structure; forming above the capping layer an adhesion layer contacting the metal structure, forming an insulating layer above the adhesion layer, etching the insulating layer and the adhesion layer to form a recess exposing the metal structure, and filling the fuse via recess to form a fuse via.