Andrew H. Simon
113Patents
18h-index
156Co-inventors
89Inventor score
Filing activity: Apr 7, 1980 → Sep 8, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6181012A | Copper interconnection structure incorporating a metal seed layer | Electricity | 185 | Expired |
| US5933753A | Open-bottomed via liner structure and method for fabricating same | Electricity | 160 | Expired |
| US6123825A | Electromigration-resistant copper microstructure and process of making | Emerging Cross-Sectional Technologies | 60 | Expired |
| US6399496B1 | Copper interconnection structure incorporating a metal seed layer | Electricity | 53 | Expired |
| US6975032B2 | Copper recess process with application to selective capping and electroless plating | Electricity | 51 | Expired |
| US7446036B1 | Gap free anchored conductor and dielectric structure and method for fabrication thereof | Electricity | 37 | Active |
| US6924223B2 | Method of forming a metal layer using an intermittent precursor gas flow process | Electricity | 37 | Expired |
| US5268069A | Safe method for etching silicon dioxide | Electricity | 33 | Expired |
| US6784105B1 | Simultaneous native oxide removal and metal neutral deposition method | Electricity | 23 | Expired |
| US6337151B1 | Graded composition diffusion barriers for chip wiring applications | Emerging Cross-Sectional Technologies | 23 | Expired |
| US9502350B1 | Interconnect scaling method including forming dielectric layer over subtractively etched first conductive layer and forming second conductive material on dielectric layer | Electricity | 22 | Active |
| US9601426B1 | Interconnect structure having subtractive etch feature and damascene feature | Electricity | 21 | Active |
| US4323398A | Performing maintenance operations on heat exchanger tube bundles | Performing Operations; Transporting | 20 | Expired |
| US10177031B2 | Subtractive etch interconnects | Electricity | 19 | Active |
| US6949461B2 | Method for depositing a metal layer on a semiconductor interconnect structure | Electricity | 18 | Expired |
| US6960519B1 | Interconnect structure improvements | Electricity | 18 | Expired |
| US7405147B2 | Device and methodology for reducing effective dielectric constant in semiconductor devices | Emerging Cross-Sectional Technologies | 18 | Expired |
| US8056039B2 | Interconnect structure for integrated circuits having improved electromigration characteristics | Electricity | 18 | Active |
| US8232646B2 | Interconnect structure for integrated circuits having enhanced electromigration resistance | Electricity | 17 | Active |
| US9171801B2 | E-fuse with hybrid metallization | Electricity | 17 | Active |
| US9679810B1 | Integrated circuit having improved electromigration performance and method of forming same | Electricity | 16 | Active |
| US6958540B2 | Dual damascene interconnect structures having different materials for line and via conductors | Electricity | 16 | Expired |
| US8232148B2 | Structure and method to make replacement metal gate and contact metal | Electricity | 16 | Active |
| US6380075B1 | Method for forming an open-bottom liner for a conductor in an electronic structure and device formed | Electricity | 16 | Expired |
| US6465376B2 | Method and structure for improving electromigration of chip interconnects | Emerging Cross-Sectional Technologies | 14 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.