Methods of forming gate structures for semiconductor devices using a replacement gate technique and the resulting devices

US9184263B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Xiuyu Cai · San Diego, US
• Ajey Poovannummoottil Jacob · Watervliet, US
• Daniel T. Pham · Clifton Park, US
• Mark V. Raymond · Austin, US
• Christopher M. Prindle · Poughkeepsie, US
• Catherine B. Labelle · Wappingers Falls, US
• Linus Jang · Champaign, US
• Robert Teagle · Hopewell Junction, US

Key dates

• Filing date: Dec 30, 2013
• Grant date: Nov 10, 2015
• Expiry date: Jan 3, 2034

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/6219
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

One method disclosed herein includes, among other things, forming sidewall spacers adjacent opposite sides of a sacrificial gate electrode of a sacrificial gate structure, forming a tensile-stressed layer of insulating material adjacent the sidewall spacers, removing the sacrificial gate structure to define a replacement gate cavity positioned between the sidewall spacers, forming a replacement gate structure in the replacement gate cavity, forming a tensile-stressed gate cap layer above the replacement gate structure and within the replacement gate cavity and, after forming the tensile-stressed gate cap layer, removing the tensile-stressed layer of insulating material.