Inventor · Austin, TX, US

Mark V. Raymond

32Patents
7h-index
73Co-inventors
72Inventor score

Filing activity: Feb 28, 1997 → Jan 31, 2020

Most-cited inventions

PatentTitleAreaCited byStatus
US6096127A Tuneable dielectric films having low electrical losses Electricity 126 Expired
US6576967B1 Semiconductor structure and process for forming a metal oxy-nitride dielectric layer Electricity 16 Expired
US10157794B1 Integrated circuit structure with stepped epitaxial region Electricity 11 Active
US9721889B1 Middle of the line (MOL) metal contacts Electricity 10 Active
US6518070B1 Process of forming a semiconductor device and a semiconductor device Electricity 9 Expired
US7655550B2 Method of making metal gate transistors Electricity 8 Active
US9147765B2 FinFET semiconductor devices with improved source/drain resistance and methods of making same Electricity 7 Active
US9184263B2 Methods of forming gate structures for semiconductor devices using a replacement gate technique and the resulting devices Electricity 5 Active
US9947589B1 Methods of forming a gate contact for a transistor above an active region and the resulting device Electricity 5 Active
US9142633B2 Integrated circuits and methods for fabricating integrated circuits with silicide contacts on non-planar structures Electricity 5 Active
US10204994B2 Methods of forming a semiconductor device with a gate contact positioned above the active region Electricity 4 Active
US10580696B1 Interconnects formed by a metal displacement reaction Electricity 3 Active
US10593593B2 Methods, apparatus, and system for protecting cobalt formations from oxidation during semiconductor device formation Electricity 1 Active
US6743668B2 Process for forming a metal oxy-nitride dielectric layer by varying the flow rate of nitrogen into the chamber Electricity 1 Expired
US10854515B2 Methods, apparatus, and system for protecting cobalt formations from oxidation during semiconductor device formation Electricity 0 Active
US11031484B2 Silicided gate structures Electricity 0 Active
US10283372B2 Interconnects formed by a metal replacement process Electricity 0 Active
US11621333B2 Gate contact structure for a transistor device Electricity 0 Active
US9218975B2 Methods of forming a replacement gate structure having a gate electrode comprised of a deposited intermetallic compound material Electricity 0 Active
US9859217B1 Middle of the line (MOL) metal contacts Electricity 0 Active
US10727308B2 Gate contact structure for a transistor Electricity 0 Active
US8854067B2 Circular transmission line methods compatible with combinatorial processing of semiconductors Electricity 0 Active
US8652963B2 MOSFET integrated circuit with uniformly thin silicide layer and methods for its manufacture Electricity 0 Active
US10643894B2 Surface area and Schottky barrier height engineering for contact trench epitaxy Electricity 0 Active
US10026693B2 Method, apparatus, and system for MOL interconnects without titanium liner Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.