High voltage field balance metal oxide field effect transistor (FBM)
US9450083B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2015 |
| Grant date | Sep 20, 2016 |
| Priority date | — |
| Expiry date | Aug 31, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a semiconductor substrate of a first conductivity type. A first conductivity type epitaxial layer disposed on a top surface of the substrate includes a surface shielded region above a less heavily doped voltage blocking region. A body region of a second conductivity type opposite the first conductivity type is disposed near a top surface of the surface shielded region. A first conductivity type source region is disposed near the top surface inside the body region. A drain is disposed at a bottom surface of the substrate. A gate overlaps portions of the source and body regions. Gate insulation separates the gate from the source and body regions. First and second trenches formed in the surface shielded region are lined with trench insulation material and filled with electrically conductive trench filling material. Second conductivity type buried doped regions are positioned below the first and second trenches, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.