Mesh-style NCEM pads, and process for making semiconductor dies, chips, and wafers using in-line measurements from such pads

US9805994B1 · kind B1 · utility

Assignee

• PDF SOLUTIONS, INC. · US

Inventors

• Stephen Lam · Merced, US
• Dennis Ciplickas · San Jose, US
• Tomasz Brozek · معلمی نژاد, US
• Jeremy Cheng · San Jose, US
• Simone Comensoli · Gandino, IT
• Indranil De · Alameda, US
• Kelvin Doong · Hsinchu, TW
• Hans Eisenmann · Tutzing, DE
• Timothy Fiscus · Beaver, US
• Jonathan Haigh · Pittsburgh, US
• Christopher Hess · Belmont, US
• John Kibarian · Los Altos Hills, US
• Sherry Lee · San Jose, US
• Marci Liao · Santa Clara, US
• Sheng-Che Lin · Hsinchu, TW
• Hideki Matsuhashi · Santa Clara, US
• Kimon Michaels · Monte Sereno, US
• Conor O'Sullivan · Campbell, US
• Markus Rauscher · Munich, DE
• Vyacheslav Rovner · Pittsburgh, US
• Andrzej Strojwas · Pittsburgh, US
• Marcin Strojwas · Pittsburgh, US
• Carl Taylor · Pittsburgh, US
• Rakesh Vallishayee · Dublin, US
• Larg Weiland · Hollister, US
• Nobuharu Yokoyama · Tokyo, JP

Key dates

• Filing date: Apr 4, 2016
• Grant date: Oct 31, 2017
• Expiry date: Apr 4, 2036

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L22/14
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

Wafers, chips, or dies that contain fill cells with structures configured to obtain in-line data via non-contact electrical measurements (“NCEM”). Such NCEM-enabled fill cells may target/expose a variety of open-circuit, short-circuit, leakage, or excessive resistance failure modes, and may include NCEM pads that comprise a mesh of GATECNT and AACNT stripes. Such wafers, chips, or dies may include Designs of Experiments (“DOEs”), comprised of multiple NCEM-enabled fill cells, in at least two variants, all targeted to the same failure mode(s).