High voltage field balance metal oxide field effect transistor (FBM)
US9865678B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 12, 2016 |
| Grant date | Jan 9, 2018 |
| Priority date | — |
| Expiry date | Aug 12, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a semiconductor substrate and epitaxial layer of a first conductivity type with the epitaxial layer on a top surface of the substrate. A body region of a second conductivity type opposite the first conductivity type is disposed near a top surface of the epitaxial layer. A first conductivity type source region is inside the body region and a drain is at a bottom surface of the substrate. An inslated gate overlaps the source and body regions. First and second trenches in the epitaxial layer are lined with insulation material and filled with electrically conductive material. Second conductivity type buried regions are positioned below the trenches. Second conductivity type charge linking paths along one or more walls of the first trench electrically connect a first buried region to the body region. A second buried region is separated from the body region by portions of the expitaxial layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.