Synopsys Taiwan Co., Ltd.
27Patents
25Active
27Granted
43Portfolio score
Filing activity: Mar 14, 2011 → Nov 14, 2014
Most-cited patents
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8924912B2 | Method of recording and replaying call frames for a test bench | Physics | 15 | Active |
| US8832615B2 | Method for detecting and debugging design errors in low power IC design | Physics | 9 | Active |
| US9081924B2 | Method and apparatus for transaction recording and visualization | Physics | 9 | Active |
| US8607182B2 | Method of fast analog layout migration | Physics | 8 | Active |
| US8739089B2 | Systems and methods for increasing debugging visibility of prototyping systems | Physics | 8 | Active |
| US9256706B2 | Knowledge-based analog layout generator | Physics | 8 | Active |
| US8893069B2 | Method of schematic driven layout creation | Physics | 5 | Active |
| US8789008B2 | Methods for generating device layouts by combining an automated device layout generator with a script | Physics | 5 | Active |
| US8782588B2 | Multiple level spine routing | Physics | 4 | Active |
| US8732650B2 | Method and apparatus for versatile controllability and observability in prototype system | Physics | 3 | Active |
| US8719762B2 | Method and apparatus for turning custom prototype boards into co-simulation, co-emulation systems | Physics | 3 | Active |
| US8943452B2 | Hierarchical power map for low power design | Physics | 3 | Active |
| US8683417B2 | Multiple level spine routing | Physics | 3 | Active |
| US8875081B2 | Systems and methods for designing and making integrated circuits with consideration of wiring demand ratio | Physics | 2 | Active |
| US8839179B2 | Prototype and emulation system for multiple custom prototype boards | Physics | 2 | Active |
| US8832632B1 | Compact routing | Physics | 1 | Active |
| US8959473B2 | Multiple level spine routing | Physics | 1 | Active |
| US8990756B2 | Gateway model routing with slits on wires | Physics | 1 | Active |
| US9053264B2 | What-if simulation methods and systems | Physics | 1 | Active |
| US9305127B2 | P-cell caching | Physics | 1 | Active |
| US8869084B2 | Parameterized cell layout generation guided by a design rule checker | Physics | 0 | Active |
| US9311441B2 | Switch cell | Physics | 0 | Active |
| US8561002B2 | Multiple level spine routing | General | 0 | Revoked |
| US9003350B2 | Multiple level spine routing | Physics | 0 | Active |
| US8561000B2 | Multiple level spine routing | General | 0 | Revoked |
Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.