Alok Tripathi
16Patents
6h-index
29Co-inventors
66Inventor score
Filing activity: Apr 27, 1992 → Mar 7, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7402048B2 | Technique for blind-mating daughtercard to mainboard | Electricity | 62 | Expired |
| US7490309B1 | Method and system for automatically optimizing physical implementation of an electronic circuit responsive to simulation analysis | Physics | 22 | Active |
| US5254210A | Method and apparatus for growing semiconductor heterostructures | Chemistry; Metallurgy | 14 | Expired |
| US6710266B2 | Add-in card edge-finger design/stackup to optimize connector performance | Electricity | 9 | Expired |
| US7307492B2 | Design, layout and method of manufacture for a circuit that taps a differential signal | Electricity | 7 | Expired |
| US9785141B2 | Method, system, and computer program product for schematic driven, unified thermal and electromagnetic interference compliance analyses for electronic circuit designs | Emerging Cross-Sectional Technologies | 6 | Active |
| US6700455B2 | Electromagnetic emission reduction technique for shielded connectors | Emerging Cross-Sectional Technologies | 5 | Expired |
| US7391829B2 | Apparatus, system and method for receiver equalization | Electricity | 5 | Expired |
| US6801043B2 | Time domain reflectometry based transmitter equalization | Electricity | 2 | Expired |
| US10585143B2 | Flip flop of a digital electronic chip | Physics | 2 | Active |
| US8601422B2 | Method and system for schematic-visualization driven topologically-equivalent layout design in RFSiP | Physics | 1 | Active |
| US10637447B2 | Low voltage, master-slave flip-flop | Physics | 0 | Active |
| US10263603B2 | Method for managing the operation of a synchronous retention flip-flop circuit exhibiting an ultra-low leakage current, and corresponding circuit | Electricity | 0 | Active |
| US10153754B2 | Method for managing the operation of a low-complexity synchronous retention flip-flop circuit, and corresponding circuit | Electricity | 0 | Active |
| US9401715B1 | Conditional pulse generator circuit for low power pulse triggered flip flop | Electricity | 0 | Active |
| US10277207B1 | Low voltage, master-slave flip-flop | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.