Inventor · Beaverton, OR, US

D. Michael Bell

23Patents
16h-index
14Co-inventors
74Inventor score

Filing activity: Dec 28, 1993 → Jun 30, 2005

Most-cited inventions

PatentTitleAreaCited byStatus
US5546546A Method and apparatus for maintaining transaction ordering and arbitrating in a bus bridge Physics 132 Expired
US5905876A Queue ordering for memory and I/O transactions in a multiple concurrent transaction computer system Physics 117 Expired
US5535340A Method and apparatus for maintaining transaction ordering and supporting deferred replies in a bus bridge Physics 91 Expired
US5594882A PCI split transactions utilizing dual address cycle Physics 81 Expired
US5434996A Synchronous/asynchronous clock net with autosense Physics 73 Expired
US5410707A Bootstrap loading from external memory including disabling a reset from a keyboard controller while an operating system load signal is active Physics 63 Expired
US6070207A Hot plug connected I/O bus for computer system Physics 61 Expired
US6021451A Method and apparatus for maintaining transaction ordering and arbitrating in a bus bridge Physics 59 Expired
US6108736A System and method of flow control for a high speed bus Physics 33 Expired
US5835739A Method and apparatus for maintaining transaction ordering and arbitrating in a bus bridge Physics 33 Expired
US6330630A Computer system having improved data transfer across a bus bridge Physics 30 Expired
US6081851A Method and apparatus for programming a remote DMA engine residing on a first bus from a destination residing on a second bus Physics 27 Expired
US5828865A Dual mode bus bridge for interfacing a host bus and a personal computer interface bus Physics 27 Expired
US6148356A Scalable computer system Physics 24 Expired
US6047120A Dual mode bus bridge for interfacing a host bus and a personal computer interface bus Physics 18 Expired
US6317799A Destination controlled remote DMA engine Physics 16 Expired
US6266778A Split transaction I/O bus with pre-specified timing protocols to synchronously transmit packets between devices over multiple cycles Electricity 14 Expired
US6134622A Dual mode bus bridge for computer system Physics 9 Expired
US7480747B2 Method and apparatus to reduce latency and improve throughput of input/output data in a processor Physics 5 Expired
US7107371B1 Method and apparatus for providing and embedding control information in a bus system Physics 5 Expired
US6088370A Fast 16 bit, split transaction I/O bus Electricity 3 Expired
US7535918B2 Copy on access mechanisms for low latency data movement Physics 2 Active
US7016989B1 Fast 16 bit, split transaction I/O bus Electricity 2 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.