Inventor · Chicago, IL, US

David E. Eichstadt

14Patents
4h-index
34Co-inventors
60Inventor score

Filing activity: Oct 26, 2000 → Jul 9, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US6468413B1 Electrochemical etch for high tin solder bumps Electricity 11 Expired
US7144490B2 Method for selective electroplating of semiconductor device I/O pads using a titanium-tungsten seed layer Electricity 7 Expired
US7332821B2 Compressible films surrounding solder connectors Emerging Cross-Sectional Technologies 5 Expired
US7316572B2 Compliant electrical contacts Emerging Cross-Sectional Technologies 4 Expired
US7566649B2 Compressible films surrounding solder connectors Emerging Cross-Sectional Technologies 4 Active
US6995475B2 I/C chip suitable for wire bonding Electricity 3 Expired
US6995084B2 Method for forming robust solder interconnect structures by reducing effects of seed layer underetching Emerging Cross-Sectional Technologies 3 Expired
US6992389B2 Barrier for interconnect and method Electricity 2 Expired
US7473997B2 Method for forming robust solder interconnect structures by reducing effects of seed layer underetching Emerging Cross-Sectional Technologies 2 Active
US12031851B2 Actuator apparatus with light actuated position sensor and secure position verification Physics 1 Active
US7572726B2 Method of forming a bond pad on an I/C chip and resulting structure Electricity 0 Active
US12416513B2 Actuator apparatus with light actuated position sensor and secure position verification Physics 0 Active
US7767575B2 Forming robust solder interconnect structures by reducing effects of seed layer underetching Emerging Cross-Sectional Technologies 0 Active
US6900142B2 Inhibition of tin oxide formation in lead free interconnect formation Electricity 0 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.